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NXP Semiconductors /MIMXRT1064 /PXP /PORTER_DUFF_CTRL

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Interpret as PORTER_DUFF_CTRL

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (POTER_DUFF_ENABLE)POTER_DUFF_ENABLE 0S0_S1_FACTOR_MODE 0S0_GLOBAL_ALPHA_MODE 0 (S0_ALPHA_MODE)S0_ALPHA_MODE 0 (S0_COLOR_MODE)S0_COLOR_MODE 0S1_S0_FACTOR_MODE 0S1_GLOBAL_ALPHA_MODE 0 (S1_ALPHA_MODE)S1_ALPHA_MODE 0 (S1_COLOR_MODE)S1_COLOR_MODE 0S0_GLOBAL_ALPHA0S1_GLOBAL_ALPHA

Description

PXP Alpha Engine A Control Register.

Fields

POTER_DUFF_ENABLE

poter_duff enable
S0_S1_FACTOR_MODE

s0 to s1 factor mode
S0_GLOBAL_ALPHA_MODE

s0 global alpha mode
S0_ALPHA_MODE

s0 alpha mode
S0_COLOR_MODE

s0 color mode
S1_S0_FACTOR_MODE

s1 to s0 factor mode
S1_GLOBAL_ALPHA_MODE

s1 global alpha mode
S1_ALPHA_MODE

s1 alpha mode
S1_COLOR_MODE

s1 color mode
S0_GLOBAL_ALPHA

s0 global alpha
S1_GLOBAL_ALPHA

s1 global alpha

Links

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Register License

Copyright 2016-2019 NXP All rights reserved.

SPDX-License-Identifier: BSD-3-Clause

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data